This invention relates to a PNPN semiconductor switch having a high sensitivity, a dV/dt erroneous operation preventing capability and a small element area, but not requiring isolation of the elements to provide a light shield when the switch is driven by light to act as a bidirectional switch. The term "dV/dt erroneous operation preventing capability" is used herein to mean a limit of a misoperation (unwanted switching operation of the PNPN element) caused by transient current created in the element when a rapidly varying voltage is impressed between the anode and cathode electrodes of the element.
The connection and element construction of a prior art light driven PNPN semiconductor switch incorporating a dV/dt erroneous operation preventing circuit are shown by FIGS. 1a and 1b respectively, which show a bidirectional switch including two PNPN semiconductor elements connected in opposition. The circuit shown in FIG. 1a comprises PNPN semiconductor elements 1 and 2, resistors 3 and 4, NPN transistors 5, 6, 7 and 8, diodes 9 and 10, a PNP transistor 11, a luminous diode 12 and terminals 13 and 14, which are connected as shown. As shown in FIG. 1b the switching element comprises a high resistance N type substrate 15, P type diffused layers 16, N type diffused layers 17 and an insulating film 18, the diffused layers being connected by surface wiring as shown in FIG. 1a. As shown in FIG. 1b, various elements contained in the substrate are spaced from each other by sufficiently large spacings, and the luminous diode 12 shown in FIG. 1a is disposed to illuminate the entire circuit.
In the circuit shown in FIG. 1a, it is now assumed that the potential of terminal 13 is higher than that of terminal 14. When a voltage which builds up rapidly is applied to the PNPN semiconductor element 1, in the absence of an erroneous operation preventing circuit, it will misoperate due to transient current generated in the element. With the circuit shown in FIG. 1a, however, transient current also simultaneously occurs in the PNP transistor 11 having a high breakdown voltage and this transient current acts as the base current of the NPN transistor 5, thus causing it to become saturated. For this reason, the collector-emitter voltage of transistor 5 is clamped to a small value so that the transient current in the PNPN semiconductor element 1 flows through the transistor 5 to prevent the gate-cathode voltage of the PNPN semiconductor element 1 from building up, thus preventing erroneous operation of the PNPN semiconductor element 1.
When the luminous element 12 is actuated at a time when the potential of the terminal 13 is higher than that of 14, the PNPN semiconductor element 1 would be turned ON. Thus, upon operation of the luminous element 12, photocurrent flows through the PNP transistor 11 as well as through the PNPN semiconductor element 1. If the photocurrent saturates the transistor 5, the PNPN semiconductor element 1 would not be turned ON; however, since the NPN transistor 7 is also driven by light to clamp the base-emitter voltage f the transistor 5, the photocurrent in the PNP transistor 11 also flows through transistor 7 with the result being that the gate-cathode voltage of the PNPN semiconductor element 1 will not be clamped, thereby turning ON the PNPN semiconductor element 1. While the photosensitivity at this time is determined by the resistance 3 connected between the gate and cathode electrodes of the element 1, the photosensitivity is lowered by the loss of the photocurrent through the PNPN semiconductor element 1 caused by the photocurrent generated at the collector junction of the NPN transistor 5 at the time of light irradiation. In the circuit shown in FIG. 1, the diode 9 acts as a voltage stabilizing element.
When the potential of terminal 14 is higher than that of the terminal 13, the same operation is performed by reading the PNPN element 1 as the PNPN element 2, resistor 3 as resistor 4, the NPN transistor 5 as NPN transistor 6, the NPN transistor 7 as NPN transistor 8 and the diode 9 as diode 10.
With the prior art PNPN switching element, it has been possible to obtain a high dV/dt durability without substantially decreasing the photosensitivity of the PNPN semiconductor element and also to receive the light from the luminous element by the entire surface of the element. Where a bidirectional switch is formed on a single monocrystalline substrate as shown in FIG. 1b, the N gates of the two PNPN elements, the base electrode of transistor 11 and so forth would have the same potential. This does not cause any trouble in a bidirectional switch and when the current flowing between these elements can be made small by high resistance, no trouble occurs, thus allowing the fabrication of two switch elements on the same substrate. If one tries to form two bidirectional switches on the same substrate or where the switch is used in the case where the base of a PNP transistor, such as transistor 11, should not have the same potential as the N gate of the PNPN element, it would become impossible to fabricate two switching elements on the same substrate. In such a case, it is necessary to separate the elements. In other words, where a bidirectional switch is formed on a single high resistance substrate, it is not necessary to separate two switching elements. However, as the number of the elements is large, and as it is necessary to sufficiently separate the elements, the chip area becomes large thus not only making it difficult to fabricate a plurality of switching elements on the same substrate but also decreasing the yield of satisfactory products. There has also been proposed a method in which various elements are perfectly isolated by surrounding them with dielectric films for the purpose of preventing interaction between elements instead by remotely separating the elements as shown in FIG. 1b. This method is called dielectric separating method. This method, however, is defective in that, as the number of the elements is large and as it is necessary to sufficiently separate respective elements, the chip area increases so that this method is not suitable for large scale integration techniques and its yield is low. There has also been proposed a construction in which the NPN transistors 7 and 8 are omitted and transistors 5, 6 and 11 and diodes 9 and 10 are shielded against light. However, in a case of using a single substrate, it is difficult to shield it from light and such construction requires a dielectric isolation structure and a light shield must be provided as shown in FIG. 2. More particularly, with the construction shown in FIG. 1 it is necessary to illuminate only one given element since the silicon substrate cannot perfectly shield light, and the light projected upon one PNPN element would leak to the other element through the substrate. With the dielectric isolation structure, the dielectric films surrounding respective PNPN elements form a plurality of light reflective interfaces which prevent leakage of light.
Another PNPN semiconductor switch has also been proposed wherein a normally ON type field effect transistor is connected across the gate and cathode electrode of the PNPN element as shown in FIG. 3 (showing only one half of the circuit). The circuit shown in FIG. 3 comprises a field effect transistor 19, diodes 20, a resistor 21 and a luminous diode 12 which are connected as shown. When the luminous element is not operated, the resistance between the gate and cathode electrode of the PNPN element is low, its sensitivity is low and dV/dt durability is high. However, when the luminous element 12 is operated to effect photodrive, the resistance between the gate and cathode element becomes high and the sensitivity increases. This construction also requires element isolation and photoshield and cannot appreciably reduce the chip area.